Specifications
- TID levels
- Processor > 1 MRad
- DRAM > 50 kRad
- other > 100 kRad
- Latch-up > 80 Mev/mg/cm^2
- SEU performance
- Processor > 40years/upset ( Adams 90%)
- All memory has SEU mitigation
- 2 Mhours MTBF, 30°C predicted
- Memory
- 512 MB DDR DRAM with single error correct double error detect EDAC. 5 Gbps access bandwidth.
- 128 kB EEPROM with hardware majority voting (triple module redundancy, 128 kB x3 device total)
- 16 MB FLASH with software majority voting (triple module redundancy, 16 MB x 3 device total) - optional
- Board temp. -40°C to 71°C (at wedge locks)
- BRE440 processor core frequency
- 83 MHz: -55° to 125°C
- 133 MHz: -10° to 80°C
- Single 3.3V supply
- 9 Watts peak
- 5 watts typical
- 3U cPCI (100mm x 175mm x 20mm)
- ~250 grams
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- 10/100 Mbps RMII Ethernet interface with LVDS buffers provides a high speed debug port
- JTAG interface with RS422 buffers provides noise tolerance and extended cable lengths
- Two(2) UART ports, configurable BAUD rates
- 32 bit 33MHz PCI with 64 bit 66MHz option
- Configurable for cPCI system slot or peripheral slot operation; Initiator and Target operation.
- Compatible with multiple operating systems Linux, OSE, Integrity, Arinc-653, Tornado etc.
- Initial board support package planned for VxWorks.
- Two front panel connectors provide Ethernet, JTAG and UART interfaces.
- Front panel also provides 2 general purpose inputs and 1 general purpose output via RS422 buffers (not shown in block diagram).
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