TOP - Avionics - Boards - Digital + Analog + NVRAM Board (MOAB)
     

The MOAB Board is designed as a single 3U cPCI card solution to interfacing to a large number and variety of commonly found subsystems, payloads, and sensors.
         
The MOAB board provides 20 full-duplex RS-422 or LVDS serial interfaces intended for use with devices such as uplink receivers, downlink transmitters, anynchronous interfaces, cross-link devices, ADCS components, and payload electronics. LVDS and 422 can be configured in any combination in increments of 4 channels. For example, a design may have 12 LVDS channels and 8 RS-422 channels, or 4 LVDS channels and 16 RS-422 channels, etc...

The MOAB board provides a MIL-STD-1553B interface and can be setup as either Bus Controller (BC) or Remote Terminal (RT).

 


 

To interface to common telecommand components, the MOAB board may be configured to be compatible with CCSDS, SGLS and other command decoding & telemetry encoding formats. Using these formats, the MOAB board may autonomously decode hardware commands, without the need for a system processor. The large amount of FPGA resource available may be used for mission/customer specific processing functions.

The 24 configurable discrete inputs and 24 outputs are provided for control and sensing of digital devices such as deployment indicators and thruster valves. The MOAB board also supplies 12 special purpose sun sensor inputs, 47 AD590 temperature sensor inputs and 24 general purpose analog input channels.

 

The memopry on the MOAB board contains a total of 768MBytes of Flash memory which can be used as-is or configured as 256MBytes of Triple-Modular-Redundant Flash with voting logic implemented in the MOAB FPGA.

The board provides 2MBytes of shared SRAM for general purpose use by the MOAB board or any devices on the cPCI bus.

For custom implementations using the MOAB architecture, 2 million gates of FPGA resources are available in a rad-tolerant, space flight qualified Actel FPGA.

For many missions the MOAB together with a CPU board can make a complete spacecraft C&DH System.

         
  • 2 Million Gate FPGA
    (Actel Axcelerator)
  • 2 Mbytes SRAM with EDAC
    768MBytes Flash / 256MBytes Flash with TMR
  • 47 AD590 Temperature Sensor Channels
  • 8 AD590 Excitations
  • 12 Sun Sensor Channels
  • 3 Sun Sensor Excitations
  • 24 General Purpose Analog Channels
  • 20 Differential RS422/LVDS Transmitters
  • 20 Differential RS422/LVDS Receivers
  • 24 Discrete Outputs
    (Configurable to 3.3V or 5V)
  • 24 Discrete Inputs
    (Configurable to 3.3V to 28V)
  • MIL-STD-1553B Interface
    using BAE Summit Chip
  • All Parts SEL Immune
  • SEU Mitigated Design
  • 30 kRad Standard
    (100 kRad Option)
  • Conduction Cooled Design
  • All Parts MIL-883B
  • < 0.4 kg
  • < 6.0 Watts Peak
  • 100mm x 175mm x 30mm
    (3U cPCI)
Engineering Unit shown above