Payload I/O + Mass Memory Boards

LVDS Serializer/Deserializer – RS422 – LVDS – SDRAM – Analog I/O – 1PPS Out

CASI™ Board Series

The Camera and Storage Interface Boards (CASI) are designed as a single 3U cPCI card solution to interface to spacecraft communication subsystems and payloads, such as cameras or radar payloads where high data rates anddata storage volume are required.

The CASI board provides an integrated camera/payload and mass storage interface. The board delivers 512Mbytes of SDRAM for mass storage, 3 LVDS Multiplexed Deserializers for high-speed LVDS interfaces, 12 LVDS or RS422 differential inputs and 12 LVDS or RS422 differential outputs (can be utilized for SpaceWire applications), 8 Bi-level outputs, and 7 Bi-level inputs.

The components chosen are radiation hardened and fault tolerant making the CASI a robust I/O connection. The board utilizes the radiation hardened Actel RTAX2000 FPGA for its 32-bit 33MHz PCI target and PCI DMA controller interface, SDRAM controller, and all customer defined camera/payload interface functions.

Typical Features

• 33 MHz, 32bit cPCI v2.1 Bus Interface with DMA Controller
• 3 LVDS 3-to-21 Deserializers for Camera and Payload Input
• 12 LVDS or RS-422 Receiver Interfaces
• 12 LVDS or RS-422 Transmitter Interfaces
• Differential interfaces can be configured as LVDS or RS422 in sets of 4
• SpaceWire via LVDS Option
• 512 MBytes to 2 GBytes SDRAM
• 7 Bi-Level Discrete Inputs
• 8 Bi-Level Discrete Outputs
• Actel RTAX2000 FPGA
• Conduction Cooled
• 128-Pin Micro-D Front Panel Connector

Mass, Power, Dimensions

• <0.28 kg
• <4.5 Watts Peak
• 100 mm x 175 mm x 30 mm (3U cPCI)

Reliability Features

• All Parts SEL Immune
• SEU Mitigated Design
• 30 kRad Standard (100 kRad Option)

Program Heritage

• TacSat-2, XSS-11, AMS (Gen 1 CASI)
• Angels, LADEE (Gen 2 CASI)

CASI & PIB Availability

• Engineering Boards 3-6 Months ARO (depending on NRE required)
• Flight Boards 6 Months after EM

PIB™ Board Series

The Payload Interface Board is designed as a single 3U cPCI card solution to interface to spacecraft payload subsystems, with configurable real-time and high-rate interfaces and 1GByte of mass memory SDRAM.

The PIB boards are derived from the CASI series to provide an integrated payload and mass storage interface board. A typical board delivers 1Gbyte of EDAC SDRAM for mass storage, 4 configurable high-rate synchronous/asynchronous payload receive interfaces, 4 configurable real-time asynchronous receive interfaces, 4 configurable asynchronous command interfaces, 32 Bi-level inputs, 32 Bi-level outputs, 16 open-collector outputs and 32 differential analog channel inputs.

The components chosen are radiation hardened and fault tolerant making the PIB a robust I/O connection. The board utilizes the radiation hardened Actel RTAX2000 FPGA for its 32-bit 33MHz PCI target, SDRAM controller, and all customer-defined payload interface functions.

Typical Features

• 33 MHz, 32bit cPCI v2.1 Bus Interface with DMA Controller
• 4 Synchronous Receive Interfaces 100 kbps to 2 Mbps (Note: These four interfaces can each alternatively be configured as asynchronous interfaces for high-rate data input)
• 4 Asynchronous Receive Interfaces
• 4 Asynchronous Transmit Interfaces
• 32 Differential Analog Voltage Inputs (+/-10 Volt)(Or up to 24 AD590 Sensor Inputs)
• 32 Discrete (5V) Inputs
• 32 Discrete (5V) Outputs
• 16 Open-collector Outputs
• 4 Differential 1PPS Outputs
• 1 GBytes SDRAM with EDAC
• Actel RTAX FPGA with Bus Interface, Customer & Mission Specific Logic
• Conduction Cooled
• 256-Pin Micro-D Front Panel Connector